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Records matching criteria: 98271

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· PRC202470K/250K

Description: The HY29F400s sector erase architecture allows any number of array sectors to be erased and re- programmed without affecting the data contents of other sectors. Device erasure is initiated by executing the Erase command. This initiates an internal algorithm that automatically preprogram...

Applications: DEVICE POWER SUPPLY: The VCC pin is used to supply the source voltage to the device. Program and erase operations are inhibited when VCC is less than or equal to VLKO. Operations at invalid VCC voltages may produce spurious results and should not be attempted.

Features: The PRC202470K/250K supports the ISA Plug-and-Play Standard register set (Version 1.0a) and provides the recommended functionality to support Windows operating systems, PC99, and PC2001. The I/O Address, DMA Channel, and Hardware IRQ of each device in the PRC202470K/250K may be reprogrammed ...

· PAN401ASI-O

· PTB20206

Description: © Philips Electronics N.V. 2000 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliab...

Applications: The SSTV16857 is a 14-bit registered buffer designed for 2.3V-2.7V VDD and supports low standby operation. All data inputs and outputs are SSTL_2 level compatible with JEDEC standard for SSTL_2. RESET is an LVCMOS input since it must operate predictably during the power-up phase. RESET, ...

Features: The electrical placement of the PTB20206 on a printed circuit card is such that it separates the host power supply and any on-board DC-to-DC converters (or LDOs) from the backend circuitry such as multiple DSPs, micropro- cessors and associated glue logic. The host supplies, and any othe...

· PIC93LC46B-I/P

Vendor:MICROCHIP   Package Cooled:06+   D/C:06+   

Description: FEATURES (CONTINUED) Single Instruction Multiple Data (SIMD) Architecture Provides: Two Computational Processing Elements Concurrent ExecutionEach Processing Element Executes the Same Instruction, but Operates on Different Data Code Compatibilityat Assembly Level, Uses the Same I...

Applications: The IDT octal buffer/line driver is built using an advanced dual metal CMOS technology. The FCT540T is similar in function to the FCT240T, except that the inputs and outputs are on opposite sides of the package. This pinout arrangement makes these devices especially useful as output ports f...

Features: The disabling of the inputs can be used to take advantage of the typical Write cycle time. Once the Stop condition is issued to indicate the end of the host's Write operation, the PIC93LC46B-I/P initiates the internal Write cycle. ACK polling can be initiated immediately. This involves is...

· PIC93LC46BI/P

· PEB20550HV1.2

Description: The DS1809 Dallastat is a nonvolatile digitally controlled potentiometer that provides 64 uniform wiper positions over the entire resistor range; including the high-end and low-end terminals of the device. The DS1809 is a low power, low voltage device capable of operating from power supplies ...

Applications: Software Data Protection The M28LV16 offers a software controlled write protection facility that allows the user to inhibit all write modes to the device including the Chip Erase instruction. This can be useful in protecting the memory from inadvertent write cycles that may occur due t...

Features: After the 1st data word has been shifted out and CS remains asserted with the SK clock continuing to toggle, the PEB20550HV1.2 will automatically increment to the next address and shift out the next data word. As long as CS is continuously asserted and SK continues to toggle, the device ...

· PEB20550H-V1.2

Vendor:INFINEON   Package Cooled:STK   D/C:2004+   

· PSA23-11SRWA

Vendor:.   Package Cooled:.   D/C:07+   

· PKS2213PI

Description: In such cases a mechanical shutter is needed to shield the array from incident illumina- tion during the readout period to avoid parasitic signal (smearing) particularly at low data rates. Such a shutter is not necessary if no light is coming onto the photosensitive area during the readout ...

Applications: Diagonal 4.5mm (Type 1/4) 752 (H) 582 (V) approx. 440K pixels 795 (H) 596 (V) approx. 470K pixels 4.47mm (H) 3.80mm (V) 4.85µm (H) 4.65µm (V) Horizontal (H) direction: Front 3 pixels, rear 40 pixels Vertical (V) direction:Front 12 pixels, rear 2 pixels Horizontal 2...

Features: The PKS2213PI Monetary iButton with SHA-1 Function is a rugged 4 kbit read/write data carrier that can be easily accessed with minimal hardware. Its NV memory acts as a localized database for public as well as protected data belonging to the owner of the device and the environment in which it...

· PST9120NR

Vendor:Panasonic   Package Cooled:SOT-23   D/C:07+   

Description: 1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test problems by tester ground degradation. Characterized but not 100% tested. 2. Measured using two 16-bit counters. 3. Typical values are at VCC = 3.3V and TA = 25C. 4. Maximum ICC varies w...

Applications: Isense (Current Sense) The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the external Power Switch. When Isense reaches the internal threshold of the Current Limit Comparator, the Driver output is disabled. By this mean the Over Current ...

Features: In addition, the XC73144 includes a programmable power management feature to specify high-performance or low- power operation on an individual Macrocell-by-Macrocell basis. Unused Macrocells are automatically turned off to minimize power dissipation. Designers can operate speed-critical ...

· PDM41256SA-15PI

Vendor:PARADIGM   Package Cooled:STK   D/C:0610+   

· PG5402

Vendor:ON   Package Cooled:SMD   D/C:07+   

· PSD312-B-90JI

Description: SUMMARY DESCRIPTION The M29W320D is a 32 Mbit (4Mb x8 or 2Mb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be per- formed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in...

Applications: Designed for the fast growing direct broadcast satellite (DBS) digital TV receiver market, the SGS-THOMSON PSD312-B-90JIB Digital Satellite Receiver Front-end integrates all the functions needed to demodulate incoming digital satellite TV signals from the tuner : Nyquist filters, QPSK/B...

Features: The PSD312-B-90JI (DSIC) and MT9174 (DNIC) are functionally identical to the MT9171/72 except for the addition of one feature. The PSD312-B-90JI/74 include a digital output pin indicating the temporal position of the received "SYNC" bit of the biphase transmission. This feature...

· PSD312B-90JI

Vendor:ST   Package Cooled:07+   D/C:01   

Description: Hynix HYMD132725B(L)8J-J series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD132725B(L)8J-J series consists of eighteen 16Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass...

Applications: Ultra-high current, ultra-low dropout voltage regulator High-efficiency linear power supplies Low-voltage distributed power Fixed telecom Multimedia and PC power supplies Battery chargers Low-voltage DSP, microprocessor and microcontroller power supplies

Features: When power is applied to VDD, an internal power-on reset holds the PSD312B-90JI in a reset condition until VDD has reached VPSD312B-90JIOR. At that point, the reset condition is released and the PSD312B-90JI registers and state machine will initialize to their default states. Thereafter, VD...

· PSD312B90JI

Description: This pin normally functions as a three-state input that controls the two LSBs of the Serial Bus Address. When this pin is tied to VCC the two LSBs are 01. When tied to Ground, the two LSBs are 10. If this pin is not connected, the two LSBs are 00. This pin also functions as an output duri...

Applications: Power Supply for the RF Section. Decoupling capacitors to the ground plane should be placed as close as possible to this pin. V DD1 should have a value of between 2.7 V and 5.5 V. V DD1 must have the same potential as VDD2. Power Supply for the RF Charge Pump. This should be greater than or ...

Features: Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All current into device pins are positive; all current out of device pins are negative; all voltages are referenced to ground unless otherwise specified.

· PHT2508

Description: When a BASE TIMER overflow occurs, it will set the IRQTMR flag. The IRQTMR flag cannot be directly accessed by the software. Once set by an interrupt source, it remains HIGH unless cleared by writing '1' to the corresponding bit in CLRIRQX ($00C2H). This register is cleared to '0' on initializ...

Applications: A voltage acquisition window immediately follows a brief rest time after the charge pulse. No charge is applied during the rest time or during the acquisition window to allow the battery chemistry to settle. Since no current is flowing, the measured cell voltage is not obscured by any intern...

Features: A Read Data from Memory (READ) instruction loads the address of the first byte or word to be read in an internal address register. The data at this address is then clocked out serially. The ad- dress register is automatically incremented after the data is output and, if Chip Select Inpu...

· POLYM2

· PC817SHARPPC817SHARPPC817SHARP

· PQ05DN11

Vendor:SHARP   Package Cooled:TO263   D/C:O3   

Description: NOTE: Pins designated as "NC" are typically unbonded pins. However some of them are bonded for special testing purposes. Hence if a signal is applied to these pins, care should be taken that the voltage applied on these pins does not exceed the VCC applied to the device. This will e...

Applications: The SecSi (Secured Silicon) Sector is an extra 64 KByte sector capable of being permanently locked by AMD or customers. The SecSi Indicator Bit (DQ7) is permanently set to a 1 if the part is factory locked, and set to a 0 if customer lockable. This way, cus- tomer lockable parts can neve...

Features: PARTTEMP RANGEPIN-PACKAGE PQ05DN11ETC075-40C to +85C12 Thin QFN-EP** PQ05DN11ETC130-40C to +85C12 Thin QFN-EP** PQ05DN11ETC150-40C to +85C12 Thin QFN-EP** PQ05DN11ETC180-40C to +85C12 Thin QFN-EP** PQ05DN11ETC250-40C to +85C12 Thin QFN-EP** PQ05DN11ETCxyz*-40C to +85C12 Thin QF...

· PC74HCT132T-TELPC74HCT132T-TELPC74HCT132TTEL

· PC74HCT132TTELPC74HCT132TTELPC74HCT132TTEL

· P87C51SBAAC

Vendor:PHI   Package Cooled:PLCC   D/C:00+   

Description: Figure 7 shows the BUF12800 in a typical configuration. In this configuration, the BUF12800 device address is 74h. The output of each DAC is immediately updated as soon as data is received in the corresponding register (LD = 0). For maximum dynamic range, set VREFH = VS − 0.2V and ...

Applications: The DSP56824 is a member of the DSP56800 core-based family of Digital Signal Processors (DSPs). This general purpose DSP combines processing power with configuration flexibility, making it an excellent cost-effective solution for signal processing and control functions. Because of its low cos...

Features: TheVIN input should be capacitively bypassed to reduce AC impedance and minimize noise effects due to the switch- ing internal to the device. It is recommended that a large value capacitor (at least equal to C1) be connected from VIN to GND for optimal circuit performance.

· PA2012

· PCD80721EL/B00/N3

Vendor:PHILIPS   Package Cooled:BGA   D/C:0525+   

Description: Member of the Texas Instruments Widebus™ Family Low-Power Advanced CMOS Technology Operates From 3-V to 3.6-V VCC Load Clock and Unload Clock Can Be Asynchronous or Coincident Full, Empty, and Half-Full Flags Programmable Almost-Full/Almost-Empty Flag Fast Access Times of 18 ns With...

Applications: n Pop & click circuitry eliminates noise during turn-on and turn-off transitions n Low, 2µA (max) shutdown current n Low, 12mA (typ) quiescent current n 12Vp-p mono BTL output, load = 2µF + 30Ω, VDD = 3V n Short circuit protection n Unity-gain stable n External ...

Features: The PCD80721EL/B00/N3 is a low-cost, low-power, analog output three-axis linear accelerometer packaged in QFN pack- age. The complete device includes a sensing element and an IC interface able to take the information from the sensing element and to provide an analog signal to the external w...

· PS25LV20-100C

Vendor:N/A   Package Cooled:N/A   D/C:0632   

· PMBT5551

Description: NOTES 1. Operating temperature range is as follows: B Version: C40C to +85C. 2. Guaranteed by design. Sample tested to ensure compliance. 3. I CP is internally modified to maintain constant loop gain over the frequency range. 4. TA = +25C; AV DD = DV DD = V VCO = 3.3V; P = 32. 5. These Cha...

Applications: Note 1: Operating the device beyond parameters with listed absolute maximum ratings may cause permanent damage to the device. Typical values indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. The guaranteed specifications ...

Features: In addition to ISP Flash memory, DSM devices add programmable logic (PLD) and up to 16 con- figurable I/O pins to the DSP system. The state of each I/O pin can be driven by DSP software or PLD logic. PLD and I/O configuration are program- mable by JTAG ISP, just like the Flash memory. ...

· PF84265TV1

· PFFK3216HC040-T

Description: Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithman internal algorithm that automati- cally preprograms the array (if it is not already programmed) before executing the erase operation.

Applications: Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accura...

Features: • Plastic package has Underwriters Laboratory Flammability Classification 94V-0 • High case dielectric strength of 1500 VRMS • Ideal for printed circuit boards • Glass passivated chip junction • High surge current capability

· PC16550DUPC16550DUPC16550DU

· PIC16C58IP

· PHILIPS20100.5W25MR5

Description: Current setting resistor (band-gap sense voltage). This terminal is connected to a precision external resistance to set the internal operating currents and the cable-driver output currents. A resistance of 6.04 kΩ, 1% between R0 and R1, is required to meet the 1394b output-voltage lim...

Applications: The PHILIPS20100.5W25MR5 implements logic functions as sum-of-products expressions in a programmable- AND/fixed-OR logic array. User-defined functions are cre- ated by programming the connections of input signals into the array. User-configurable output structures in the form of I/O macr...

Features: PHILIPS20100.5W25MR5234/PHILIPS20100.5W25MR5234-3/PHILIPS20100.5W25MR5234-6−25˚C to +100˚C PHILIPS20100.5W25MR50˚C to +70˚C Soldering Information TO-92 Package (10 sec.)260˚C TO-46 Package (10 sec.)300˚C SO Package Vapor Phase (60 sec.)215˚C ...

· PBYR75N03

Vendor:PH   Package Cooled:T0-263   D/C:2002   

· PM7524HS/FS

Vendor:PMI   Package Cooled:SOP-16   D/C:07+   

· PT7C4302WE

Vendor:PERICOM   Package Cooled:STK   D/C:0642+   

· PS2011

Vendor:NEC   Package Cooled:DIP   D/C:02+   

Description: For a typical application, where 2kbaud date has to be sent to a transponder using a Manchester or Biphase encoding scheme, the most important harmonics lie in a bandwidth between 400Hz and 3.6kHz. As can be seen from the graphs below, the antenna parameters can significantly reduce the avai...

Applications: The read transaction shows a request packet at clock edge T0 containing an ACT command. This causes row Ra of bank Ba of the memory component to load into the sense amp array for the bank. A second request packet at clock edge T5 contains a read (RD) command. This causes the data packet Q...

Features: DC Tests TC = +250C, 1 Cycle, t 1.0 s Test 1 VCE = 20 Vdc, IC = 50 mAdcAll Types Test 2 VCE = 100 Vdc, IC = 10 mAdcAll Types Test 3 VCE = 300 Vdc, IC = 3.3 mAdcPS2011 VCE = 200 Vdc, IC = 5.0 mAdcPS2011 VCE = 250 Vdc, IC = 4.0 mAdcPS2011 (3) Pulse Test: Pulse Width = 300...

· PQ30RV31J00H

Vendor:SHARP   Package Cooled:TO-220   D/C:06+   

Description: LPC Bus Interface Based on Intels LPC Interface Specification Revi- sion 1.0, September 29, 1997 Synchronous cycles using up to 33 MHz bus clock 8-bit I/O read and write cycles Up to four 8-bit DMA channels Serial IRQ (SERIRQ) Reset input (PCI_RESET) Optional power-down supp...

Applications: BC should be connected to a 3V backup cell for RTC operation and storage register non- volatility in the absence of system power. When VCC slews down past VBC (3V typical), the integral control circuitry switches the power source to BC. When VCC returns above VBC, the power source is switche...

Features: Contains 64K Byte Words Onboard ROM (2K Words Reserved) 640-Word RAM 64 I/O Pins Consisting of C 40 General-Purpose Bit Configurable I/O C 8 Inputs With Programmable Pullup Resistor and Dedicated Interrupt (Key-Scan) C 16 Dedicated Output Pins Direct Speaker Driver, 32 Ω (PDM) O...

· PR31700ABCBE

Vendor:PHILIPS   Package Cooled:QFP   D/C:1998   

Applications: Bild / Fig. 5 B2 - Zweiplus-Brckenschaltung / Two-pulse bridge circuit Höchstzulässiger Ausgangsstrom / Maximum rated output current Id Gesamtverlustleist. der Schaltung / total power dissip. of the circuit Ptot Parameter: Wärmewiderstand zwischen Gehäuse und Umgebung / ...

Features: The IIN pin replicates the voltage present on the VIN pin there- fore the VIN pin can be used to reject common-mode noise and establish an input ground reference The gain control input is calibrated to 1 mA mA signal gain for 1V of control voltage The disable pin (E) is TTL-compatible and ...

· PVZ3G684C01R02

· PC87309-ICG/VLJ

Applications: The LVT16373 and LVTH16373 contain sixteen non-invert- ing latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the ...

Features: When calculating external asynchronous frequencies, use tAS1 if all inputs are on dedicated input pins. If any data is applied to an I/O pin, tAS2 must be used as the required set-up time. If (tAS2 + tAH) is greater than tACO1, 1/(tAS2 + tAH) becomes the limiting frequency in the data path mo...

· PC87309ICG/VLJ

Vendor:NS   Package Cooled:QFP-128   D/C:09+   

Description: The KM4110 offers superior dynamic performance with a 75MHz small signal bandwidth and 50V/µs slew rate. The combination of low power, high output current drive, and rail-to-rail performance make the KM4110 well suited for battery-powered communication/ computing systems.

Applications: Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure ...

· PRMA1C05B

Vendor:SRC   Package Cooled:n/a   D/C:00   

Description: The TMAX register is programmed using a standard SMBus Send Byte operation. The temperature data for- mat is 6 bits plus sign in twos complement form, with each data bit representing 2C (Table 1). The MSB is transmitted first, LSB last. The MSB (B7) of the TMAX register is an embedded control...

Applications: These references are specifically designed to be used with the Crystal Semiconductor line of successive-approximation type Analog-to-Digital Converters (ADCs). This line of ADCs sets new standards for temperature drift, which can only be as good as the external reference used. The Thal...

Features: 1 Under all conditions, VDDQ must be less than or equal to VDD 2 Peak to peak AC noise on VREF may not exceed 2% VREF (DC). VREF is also expected to track noise variations in VDDQ. 3 VTT of the transmitting device must track VREF of the receiving device.

· PIC16CE624-30/SSPIC16CE624-30/SSPIC16CE62430SS

· PIC16CE625JWPIC16CE625JWPIC16CE625JW

· P0805E4272BBTR

· PIC16C715-04E/P

Vendor:MICROCHIP   Package Cooled:DIP18   D/C:08+   

Description: The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A sys- tem reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmwa...

Applications: Note) 1. At on-state when drain voltage exceeds the "Short circuit load protection voltage", output current begin to oscillate. 2. When drain voltage exceeds the "Drain clamp voltage" output MOS turn on, so drain voltage are clamped before the drain-source junction bec...

Features: The PIC16C715-04E/P supports command set compatible with JEDEC single-power-supply EEPROMS standard. Commands are written into the command register. The register contents serve as input to an internal state- machine which controls the erase and programming circuitry. Write cycles also intern...

· P89C51X2FN

· PTZ33B

Description: USB specification v.1.0 compatible Intel UHCI (Universal Host Controller Interface) v.1.1 register compatible Legacy keyboard and PS2 mouse support Root hub and two down stream function ports Integrated physical layer transceivers Normal and low power operating mode Operable in both USB-awar...

Applications: SERIAL DATA ENTRY INTO THE PTZ33B Serial information entry into the PTZ33B is enabled by a low level on the ENABLE input One binary bit is then accepted from the DATA input with each positive transition of the CLOCK input The CLOCK input must be low for the speci- fied time preceding and ...

Features: Case: PTZ33B Epoxy meets UL-94V-0 Flammability rating Terminals: Silver plated (E4 Suffix) leads, solderable per J-STD-002B and MIL-STD-750, Method 2026 Polarity: As marked, Positive lead by belevled corner Mounting Torque: 10 cm-kg (8.8 inches-lbs) max. Recommended Torque: 5.7 cm-kg (5 in...

· PCD0456D/1006

· PC74HCT02P

Description: Cathode-Anode Reverse Breakdown Voltage - VKA Anode-Cathode Forward Current - IAK Operating Cathode Current - IKA Reference Input Current - IREF Storage Temperature Range - TSTG Junction Temperature - TJ Lead Temperature (Soldering, 10 Seconds) - TL Continuous Power at 25 C - PD TO-92 SOI...

Applications: The voltage drop (VSR) across the sense re- sistor RS is monitored and integrated over time to interpret charge and discharge activ- ity. The SR input is tied to the high side of the sense resistor. VSR < VSS indicates dis- charge, and VSR > VSS indicates charge. The effective voltage...

Features: The PC74HCT02P high performance read only memory is organized either as 2,097,152 x 8 bit (byte mode) or as 1,048,576 x 16 bit(word mode) followed by BHE mode select. The low power feature allows the battery operation.The large size of 16M bit memory density is ideal for character generator...

· PEF82902FV11XP

· P0841SNL

· PM427244028

· PC849(16PINS)PC849(16PINS)PC84916PINS

· PC1781

· P87C54X2BA

Vendor:PHI   Package Cooled:05+   D/C:PLCC   

Description: Built on the Vishay Siliconix proprietary high voltage silicon gate process to achieve superior on/off performance, each switch conducts equally well in both directions when on, and blocks up to the supply voltage when off. An epitaxial layer prevents latchup.

Applications: Current limiting is achieved by developing 0.83V on the amplifiers current sense circuit by way of an internal tie to the output drive (pin 8) and an external current sense line (pin 1). A sense resistor RCL is used to relate this sense voltage to a current flowing from output drive.

Features: The AN78xxNSP series is a 3-pin fixed positive output type monolithic voltage regulator housed in surface mount- ing package. Stabilized fixed output voltage is obtained from unstable DC input voltage with using minimum ex- ternal components. 9 types of fixed output voltage are avail- a...

· PALC16V8-20DC

· PRN11016-39R0J

Description: the latches store information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LEn. The 3-STATE standard outputs are controlled by the Output Enable (OEn) input. When OEn is LOW, the standard outputs are in the 2-state mode. When OEn is HIGH, the sta...

Applications: See the Texas Instruments document, PowerPAD™Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD™ package. The thermal data measured on a PCB layout based on the information in the section entitled Texas Instruments Rec...

Features: The PRN11016-39R0J is a high-speed CMOS TTL-compatible dual 4:1 multi- plexer/demultiplexer with 3-state outputs. The PRN11016-39R0J is function and pinout compatible version of the 74F253, 74FCT253, and the 74ALS/AS/ LS253 dual 4:1 multiplexers. The low ON resistance of the PRN11016-39R0J...

· PM10-48S12

Description: Note 2: Unless otherwise noted, specifications apply for −55˚C Tj +150˚C for the LM123, −40˚C Tj +125˚C for the LM323A, and 0˚C Tj +125˚C for the LM323. Although power dissipation is internally limited, specifications apply only for P 30W.

Applications: NOTES: 1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).

Features: The postprocessor permits the signal conditioning characteris- tics to be programmed through a parallel or serial interface. It is programmed by loading a user-defined filter in the form of a configuration file. This filter can be loaded from a DSP or an external serial EPROM. It is genera...

· PTGL4SAS100K2N51B0

· PC1940

· PG243002

Vendor:YCL   Package Cooled:SOP/24   D/C:05+   

Description: DESCRIPTION The 74LVQ541 is a low voltage CMOS OCTAL BUS BUFFER with 3 STATE OUTPUTS NON INVERTED fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.

Applications: Notes: 1. All inputs except OE must meet setup and hold times for the Low-to-High transition of clock (CLK). 2. Wait states are inserted by suspending burst. 3. "X" means don't care. WRITE=L means any one or more byte write enable signals (BW1-BW4) and BWE are LOW or GW is LOW...

Features: The six internal memory blocks connect to the four 128-bit wide internal buses through a crossbar connection, enabling the DSP to perform four memory transfers in the same cycle. The DSPs internal bus architecture provides a total memory bandwidth of 28G bytes per second, enabling the cor...

· PS2561A-1(QH)

Vendor:NEC   Package Cooled:DIP-4   D/C:05+   

Description: The Hitachi HM62V8100I Series is 8-Mbit static RAM organized 1,048,576-word 8-bit. HM62V8100I Series has realized higher density, higher performance and low power consumption by employing Hi-CMOS process technology. It offers low power standby power dissipation; therefore, it is suitable fo...

Applications: The HC40105 and HCT40105 are high-speed silicon-gate CMOS devices that are compatible, except for shift-out circuitry, with the CD40105B. They are low-power first-in-out (FIFO) elastic storage registers that can store 16 four-bit words. The 40105 is capable of handling input and out...

Features: Notes; (1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature (2) L=3mH, IAS=5.6A, VDD=25V, RG=27Ω, Starting TJ =25C (3) ISD 5.6A, di/dt 250A/µs, VDD BVDSS , Starting TJ =25C (4) Pulse Test: Pulse Width = 250µs, Duty Cycle 2% (5) Essentially Ind...

· PEB20320HV

Description: The amplifier may also be modified to accept input from ceramic phonograph cartridges. For standard inputs (equalizer preamplifiers, tuners, etc.) C1 is 0.047µF, R1 is 250kΩ, and R2 and C2 are omitted. For ceramic-cartridge inputs, C1 is 0.0047µF, R1 is...

Applications: • HIGH-PERFORMANCE E2CMOS® TECHNOLOGY fmax = 280MHz* Maximum Operating Frequency tpd = 3.5ns* Propagation Delay Electrically Erasable and Reprogrammable Non-Volatile 100% Tested at Time of Manufacture Unused Product Term Shutdown Saves Power

Features: Hynix PEB20320HV-H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and W...

· P3504UCRP

Description: International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) usin...

Applications: Eight GLBs, 16 I/O cells, dedicated inputs (if available) and one ORP are connected together to make a Megablock (Figure 1). The outputs of the eight GLBs are connected to a set of 16 universal I/O cells by the ORP. Each ispLSI 1032EA device contains four Megablocks.

Features: The P3504UCRP supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave. The m...

· PDM41024SA-15P

Vendor:PARADIGM   Package Cooled:STK   D/C:0544+   

· POZ3KN-1-102N-T0S

Description: System oscillation circuit generates the internal clock signals for the CPU and peripheral hardware. The system clock can use a crystal, or ceramic oscillation source, or an externally-generated clock signal. To drive POZ3KN-1-102N-T0S/C0504 using an external clock source, the external cloc...

Applications: When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operat...

Features: At each input-line/product-term intersection there is an EEPROM memory cell which determines whether or not there is a logical connection at that intersection. Each prod- uct term is essentially a 44-input AND gate. A product term which is connected to both the True and Complement of an ...

· P6FMBJ30A-T

Vendor:RECTRON   Package Cooled:SMB/DO-214AA   D/C:2009+   

Description: Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms ca...

Applications: The P6FMBJ30A-T provides high signal fidelity with -74/-94dBc 2nd/3rd harmonics (1Vpp, 1MHz, RL=150Ω). Combining this high fidelity performance with P6FMBJ30A-Ts quick 46ns settling time to 0.1% makes it an excellent choice for ADC buffering.

Features: ACK Polling Once a stop condition is issued to indicate the end of the hosts write sequence, the P6FMBJ30A-T initiates the internal nonvolatile write cycle. In order to take advantage of the typical 5ms write cycle, ACK polling can begin immediately. This involves issuing the start condi...

· P3500SDL

Vendor:Teccor/Littelfuse   Package Cooled:N/A   D/C:2006+   

Description: The ADS7886 is a 12-bit, 1-MSPS analog-to-digital converter (ADC). The device includes a capacitor based SAR A/D converter with inherent sample and hold. The serial interface in each device is controlled by the CS and SCLK signals for glueless connections with microprocessors and DSPs. The ...

Applications: The P3500SDL is a CMOS charge pump voltage inverter that is designed for operation over an input voltage range of 1.15 V to 5.5 V with an output current capability in excess of 50 mA. The operating current consumption is only 122 mA, and a power saving shutdown input is provided to furthe...

Features: The Hyundai HYM72V32756T8 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes memory. The Hyundai HYM72V32756T8 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the ris...

· PSB4506A(B104-3)

Applications: The numeric devices decode positive BCD logic into characters 0-9, a C sign, decimal point, and a test pattern. The hexadeci- mal devices decode positive BCD logic into 16 characters, 0-9, A-F. An input is provided on the hexa- decimal devices to blank the display (all LEDs off) w...

Features: This device is particularly well suited for portable elec- tronics (e.g. wireless handsets, PDAs, notebook com- puters) because of its small package format and easy- to-use pin assignments. In particular, the PSB4506A(B104-3)/22 is ideal for EMI filtering and protecting data lines from E...

· PM155

Description: • Industrial operating temperature range: C40C to +85C • Packages available: C 20-pin 173 mil wide plastic TSSOP (L) C 20-pin 150 mil wide plastic QSOP (Q) C 20-pin 150 mil wide plastic TQSOP (R) C 20-pin 300 mil wide plastic SOIC (S)

Applications: ‡ Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.33-µF capacitor across the input and a 0.1-µF capacitor across the output. Full range for the PM155 is T J = 0C ...

Features: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal applied conditions in typical applications. Application of multiple maximum rating conditions at the same time may damage the device.

· PALC22V10D-10KM

· PIC16F876-04/SP4AP

Vendor:MICROCHIP   Package Cooled:06+   D/C:DIP   

Description: The MCS 96 microcontroller family members are all high-performance microcontrollers with a 16-bit CPU The 87C196CB is composed of the high-speed (20 MHz) macrocore with up to 16 Mbyte linear address space 56 Kbytes of program EPROM up to 1 5 Kbytes of register RAM and up to 512 bytes of code ...

Applications: Description Level shift-gate driver Internal regulator voltage Power VCC PMOS Gat driver Power Ground Low side driver output (N MOSFET) Chip supply voltage Charge pump pin Soft start, a capacitor to ground sets the slow start time/set low for shutdown function. Feedback input Sets...

Features: The MAX1156/MAX1158/MAX1174 are ideal for high- performance, battery-powered, data-acquisition appli- cations. Excellent AC performance (THD = -100dB) and DC accuracy (1LSB INL) make the MAX1156/ MAX1158/MAX1174 ideal for industrial process control, instrumentation, and medical applications. ...

· P4FMAJ62CA-T

Vendor:RECTRON   Package Cooled:SMA/DO-214AC   D/C:2009+   

Description: The sealed modules offer a metal baseplate for improved thermal performance. Threaded-through holes are provided to allow easy mounting or addition of a heat sink for high-temperature applications. The standard feature set includes remote sensing, output trim, and remote on/off for convenie...

Applications: The ISL6614A drives both the upper and lower gates simultaneously over a range from 5V to 12V. This drive- voltage provides the flexibility necessary to optimize applications involving trade-offs between gate charge and conduction losses.

Features: The P4FMAJ62CA-T provides several extras in addition to greater speed. These include a second full hardware serial port, seven additional interrupts, programmable watchdog timer, power-fail interrupt and reset. The device also provides dual data pointers (DPTRs) to speed block data memory mov...

· PEB20954HT

Vendor:infineon   Package Cooled:N/A   D/C:06+   

Description: Case: SOD-123, Plastic Plastic Material: UL Flammability Classification Rating 94V-0 Moisture sensitivity: Level 1 per J-STD-020A Terminals: Finish - Matte Tin Solderable per MIL-STD-202, Method 208 (Note 1) Polarity: Cathode Band Marking: See Below Weight: 0.01 grams (approx.)

Applications: PEB20954HT is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words 2 banks 16 bits. Using pipelined architecture and 0.175 µm process technology, PEB20954HT delivers a data bandwidth of up to 332M bytes per second (-5). For different applications the...

Features: PEB20954HT is a 1Mb CMOS non-volatile serial EEPROM, organized as a 128K x 8-bit memory. The PEB20954HT is available in a space-saving, 8-lead narrow SOIC package. In addition, it is available in a wide range of voltages C 2.7-3.6 V and 4.5-5.5 V.

· PBSS2515F.115

· PDB051B

· PA0053

· PD5058-B

· PCF87852E/2/S001

Vendor:PHILIPS   Package Cooled:BGA   D/C:0530+   

· P8212IP8212IP8212I

· PAT1220-C-9DB-T

Description: Important notice: This document contains information of a new product. IC Media Corp reserves the right to make any changes without further notice to any product herein to improve design, function or quality and reliability. No responsibility is assumed by IC Media Corp for its use, nor for...

Applications: Initialization of both devices must occur before data trans- mission begins. Initialization refers to synchronization of the Serializer and Deserializer PLLs to local clocks, which may be the same or separate. Afterwards, synchronization of the Deserializer to Serializer occurs. Step 1: ...

Features: Maximum rating The maximum ratings are the limit values which must not be exceeded when using the device. Any one of the rating must not be exceeded. If The maximum rating is exceeded, the characteristics may not be recovered. In some extreme cases, the device may be permanently damage. Sol...

· PESD5V0L5UV

Vendor:PHI   Package Cooled:SOT666/6   D/C:05+   

Description: PowerPC™ core with floating-point unit 26 Kbytes fast RAM and 6 Kbytes TPU microcode RAM 448 Kbytes Flash EEPROM with 5-V programming 5-V I/O system Serial system: queued serial multi-channel module (QSMCM), dual CAN 2.0B controller modules (TouCANTM) 50-channel timer system: dual...

Applications: The LPV321/358/324 are the most cost effective solutions for the applications where low voltage, low power operation, space saving and low price are needed. The LPV321/358/324 have rail-to-rail output swing capability and the input common-mode voltage range includes ground. They all exh...

Features: In a system, the 82C37A address and control outputs and data bus pins are basically connected in parallel with the system busses. An external latch is required for the upper address byte. While inactive, the controllers outputs are in a high impedance state. When activated by a DMA reques...

· PTN1206E7501BST5

· PCC1870T

Description: 3.3V 10% Output Transmit Power Supply. Bypass with 0.1µF//0.01µF low ESR capacitors and place as close to the VCC_TXQ pin as possible. Power pins are not connected internally and must be connected to the same power supply externally.

Applications: The ISP10160A firmware implements a cooperative, multitasking host adapter that provides the host system with complete SCSI command and data transport capabilities, thus freeing the host system from the demands of the SCSI bus protocol. The firmware provides two interfaces to the host s...

Features: Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, ...

· PW166B-10T

Description: ST-BUS & GCI Mode for Sin/Rout (Input). When in ST-BUS or GCI operation, this pin in conjunction with the ENA2 pin, selects the proper mode for Sin/Rout pins (see ST-BUS and GCI Operation description). Connect this pin to Vss in SSI mode.

Applications: *1 If the internal sync separation circuit is not used, either CSYNC or HD and VD are used as the input sync signal. If the internal sync separation circuit is used, sync on green (RGB) or Y (Y/color difference) is used as the input sync signal. *2 Pin used for power saving mode.

Features: The PW166B-10T and PPW166B-10T contain 512 bytes RAM and 1024 bytes RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, an...

· PCF7942AT/015

Vendor:PHI   Package Cooled:SOP-3.9-16P   D/C:02+   

Description: † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ The actual top-side marking has one additional character that designates the assembly/test site.

Applications: Eye Safety Circuit The HFBR-5710L provides Class 1 eye safety by design and has been tested for compliance with the requirements listed in Table 1. The eye safety circuit continuously monitors optical output power levels and will disable the transmitter and assert a TX_FAULT sign...

Features: The PCF7942AT/015 is a high-speed synchronous buck regulator controller with an externally adjustable reference voltage (between 0.5V to 1.5V). It can provide simple down conver- sion to output voltages as low as 0.5V. Though the control sections of the IC are rated for 3 to 6V, the drive...

· PGEW2S09

Vendor:.   Package Cooled:.   D/C:07+   

Description: The input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed. Use C6 to match the output transmission line over a greater frequency range. C6 compensates for the increase of the amplifiers output impedance with frequency.

Applications: The PGEW2S09 keeps a constant 1.25V between the out- put pin and the adjust pin. By placing a resistor R1 across these two pins a constant current flows through R1, add- ing to the Iadj current and into the R2 resistor producing a voltage equal to the (1.25/R1)*R2 + Iadj*R2 which will be adde...

Features: LCD TV/Monitors/Projectors DLP TV/Projectors PDP TV/Monitors PCTV Set-Top Boxes Digital Image Processing Video Capture/Video Editing Scan Rate/Image Resolution Converters Video Conferencing Video/Graphics Digitizing Equipment

· PEH430YK3150M2

Vendor:evx   Package Cooled:evx   D/C:dc00   

Description: Max. UnitsConditions CCCSVDS = 50V, ID = 3.3A 22ID = 3.5A 5.8nC VDS = 320V 9.3VGS = 10V, See Fig. 6 and 13 „ CCCVDD = 200V CCCID = 3.5A ns CCCRG = 12Ω CCCR D = 57Ω,See Fig. 10 „ CCCVGS = 0V CCCVDS = 25V CCCpFƒ = 1.0MHz, See Fig. 5 CCCVGS = 0V, VDS = 1.0V...

Applications: As a result of the high precision and low-noise characteristics of the OPA381, a dynamic range of 5 decades can be achieved. This capability allows the measurement of signal currents on the order of 10nA, and up to 1mA in a single I/V conversion stage. In contrast to logarithmic amplifier...

Features: The PEH430YK3150M2 is a 12-bit, 50 ksps to 200 ksps sampling Analog-to-Digital (A/D) converter that features a fully differ- ential, high impedance analog input and an external refer- ence. While best performance is achieved with reference voltage between 500mV and 2.5V, the reference vol...

· PF29LV160DB-90PFTN

Vendor:PERFECT   Package Cooled:TSOP   D/C:03+   

· PRGS-25ME-R

Description: Normally, capacitor values on the order of several hundred microfarads are used on the output of the regulators to ensure good transient response with heavy load current changes. Output capacitance can increase without limit and larger values of output capacitance further improve the

Applications: The EB-2100x accommodates either a coaxial or an optical S/PDIF digital audio interface. Either input may be selected by moving jumper J2. Connect J2 pins 1-2 for coaxial or J2 pins 2- 3 for optical S/PDIF. A Crystal CS8415A digital audio interface receiver is utilized to convert the incomin...

Features: PCI Bus Command/Byte Enable: The command signaling and byte enables are multiplexed on the same pins. During the address phase of a transaction, C/BE[3:0]# are interpreted as the bus commands.During the data phase, C/BE[3:0]# are interpreted as byte enables. The byte enables are to b...

· PEF20550HV21XT

· PMB6850EV2.1CM34

Description: As seen in the block diagram, these modules contain a single Light Emitting Diode (LED) as their light source (emitter). The light is collimated into a single parallel beam by means of a plastic lens located directly over the LED. Opposite the emitter is the integrated detector ci...

Applications: o Single-Supply Operation +4.75V to +5.25V (PMB6850EV2.1CM34) +2.7V to +3.6V (PMB6850EV2.1CM34) o 3-Wire SPI/QSPI/MICROWIRE-Compatible Interface o Internal Precision Voltage Reference 2.50V (PMB6850EV2.1CM34) 1.20V (PMB6850EV2.1CM34) o Space-Saving 16-Pin SSOP Package

Features: Drain-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Maximum Power Dissipationƒ Maximum Power Dissipationƒ Linear Derating Factor Junction and Storage Temperature Range

· PAL10H16P8-6CJT

Vendor:TI   Package Cooled:CDIP24   D/C:9039   

· PIC16LC54A-04I/SS

Vendor:SMD   Package Cooled:95+   D/C:MICROCHIP   

Description: NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC C. 2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows if input is brought below VCC C C 0.3 V. 3. The output...

Applications: In this mode the bridge commutating frequency is determined by the values of an external resistor (Rosc) and capacitor (Cosc). In this mode pin EXTDR must be connected to pin +LVS. To realize an accurate 50% duty factor, the internal divider should be used. The internal divider is enab...

Features: Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this document should be addressed to: Defense Supply Center, Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43216-5000, by using the Standardization Document Improvement ...

· PIC18F4458-I/PT

Description: Notice: This document contains preliminary information on new products in production. The specifications are subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design.

Applications: Note 4 The M1 and M2 threshold specifications are normally referenced to the VCC potential as shown in the ECL operation tables Using VEE (GND) as the reference as in normal TTL practice effectively makes the threshold vary directly with VCC Threshold is typically 1 3V below VCC (e g a 3 7V at ...

Features: the specified tBP cycle time. The DATA polling feature or the toggle bit feature may be used to indicate the end of a program cycle. SECTOR PROGRAMMING LOCKOUT: Each sector has a programming lockout feature. This feature prevents pro- gramming of data in the designated sectors once the fe...

· PQ12RF31

Vendor:SHARP   Package Cooled:20000   D/C:SHARP   

Description: High level of integration - only one power semiconductor module required for the whole drive NPT IGBT technology with low saturation voltage, low switching losses, high RBSOA and short circuit ruggedness Epitaxial free wheeling diodes with Hiperfast and soft reverse recovery Indust...

Applications: length is 24 bits with triangular PDF dither added for dynamic range and THD+N tests. Idle channel SNR is measured with both the soft and zero data mute functions disabled and 0% full-scale input data with no dither applied. The measurement bandwidth is limited by using the Audio Precisio...

Features: The COP87L88EK/RK Family OTP (One Time Program- mable) microcontrollers are highly integrated COP8™ Fea- ture core devices with 16k or 32k memory and advanced features including a Multi-Input Comparator and Single-slope A/D capability. These multi-chip CMOS devices are suited for ...

· PI4S706T

Vendor:PERICOM   Package Cooled:STK   D/C:0644+   

· PAL10L8NC

Vendor:nsc   Package Cooled:nsc   D/C:dc91   

Description: The Terminal Count (TC) output is HIGH when CET is HIGH and the counter is in its maximum count state (9 for the decade counters 15 for the binary counters) To implement synchronous multistage counters the TC outputs can be used with the CEP and CET inputs in two different ways

Applications: The Rambus Direct RDRAM™ is a general purpose high- performance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and low latency are required.

Features: The PAL10L8NC GPIB-Chip is the ideal solution to implement a IEEE488.2 GPIB interface for next generation PCI based instruments. The GPIB-ASIC is designed to meet all of the functional requirements for talker and listener (TL) devices as specified by the IEEE Standards 488.1-1987 and 488...

· PACE1999

Description: The HPR10XX Series uses advanced circuit design and pack- aging technology to deliver superior reliability and perfor- mance. A 170kHz push-pull oscillator is used in the input stage. Beat-frequency oscillation problems are reduced when using the HPR10XX Series with high frequency isolati...

Applications: Figure 1 shows a typical application connection block diagram. In order to complete a Sensorless drive control, all necessary components are shown in connection to IRMCK203. A fully self-contained drive evaluation board (IRMCS2031) based on the IRMCK203 Digital Control IC is available for d...

Features: Mega-pixel class image quality is achieved by integrating a high performance analog signal processor comprising of a high speed 10 bit A/D convertor, fixed pattern noise elimination cir- cuits and a programmable gain amplifier. The offset and black level can be automatically adjusted on chip u...

· P6SMB180C

Vendor:TSC   Package Cooled:SMB/DO-214AA   D/C:2009+   

Description: When low, "A" and "B" data is present on its respective data output lines (Parallel Mode). When high, both "A" and "B" channel data is present on the "DA0:DA11" digital outputs (Multiplex Mode). The DB0/ABb pin is used to synchronize the d...

Applications: The SIE allows the P6SMB180C series to communicate with the USB host through the USB repeater portion of the hub. The SIE handles the following USB bus activity independently of the hub microcontroller: • Bit stuffing/unstuffing • Checksum generation/checking

Features: The control input pin of the regulator. This pin via a 10V resistor is connected to the 5V supply to provide the base current for the pass transistor of both regulators. This allows the regulator to have very low dropout voltage which allows one to generate a well regu- lated 2.5V supply fro...

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