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· TSC87251G1A16CB

Vendor:TOSHIBA   Package Cooled:1000   D/C:01+   

Description: The phase detector and the M divider force the VCO output fre- quency to be M times the reference frequency by adjusting the VCO control voltage. Note that for some values of M (either too high or too low), the PLL will not achieve lock. The output of the VCO is scaled by a divider prior ...

Applications: Notes 1. Output current rating may be limited by duty cycle, ambient temperature, and heatsinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150C. 2. Maximum power dissipation at indicated ambient temperature in free air with no ...

Features: Single Voltage, Range 3V to 3.6V Supply 3-Volt-Only Read and Write Operation Software Protected Programming Fast Read Access Time - 150 ns Low Power Dissipation 15 mA Active Current 50 µA CMOS Standby Current Sector Program Operation Single Cycle Reprogram (Erase and Program) 5...

· TP87C151SB16

Vendor:int   Package Cooled:int   D/C:dc96   

Description: Description Power Switch. Connects the drain of the internal high voltage N-channel MOSFET to the Inductor and Schottky Diode to generate the LED boost voltage. This voltage is determined by the total forward bias voltage of the LED series string and the Isense resistor value. (Note: Both pin...

Applications: The SPS product family is specially designed for an off-line SMPS with minimal external components. The SPS consist of high voltage power SenseFET and current mode PWM IC. Included PWM controller features integrated fixed oscillator, under voltage lock out, leading edge blanking, optimize...

Features: The TP87C151SB16 is a 20-pin CMOS device consisting of two 6-bit non-volatile EEPROM registers, 5 hardware pin inputs and a 5-bit multiplexed output with one latched EEPROM bit. It is used for DIP switch-free or jumper-less system configuration and supports Mobile and Desktop VID Configur...

· TS27L2CPT

Vendor:ST(hot sell)   Package Cooled:SSOP-8   D/C:99(og stok))   

Description: The device also features split output bank power supplies which enable the user to run two banks (1Qn and 2Qn) at a power supply level different from that of the other two banks (3Qn and 4Qn). Additionally, the PE pin controls the synchro- nization of the output signals to either the rising or...

Applications: cleared immediately, and remains cleared. If the power is restored (no UVREG or UVREF), and if no OVERTEMP fault exists, then the latched fault remains cleared when the RESET line returns to high. However, FAULT = 1 may still occur because a UVBOOT fault condition may still exist.

Features: TS27L2CPT is a multi-function Fan Controller CMOS IC that can be applied to a variety of con s u m e r p r o d u c t s . I t h a s a n e l a s t i c function like MCU but does not need programming, user can just write a MASK form. TS27L2CPT has three or four wind modes; normal, rhythm and ...

· TC74VHCT240AF

Description: A detailed block diagram of the UCC3941 is shown in Fig. 1. Unique control circuitry provides high efficiency power conversion for both light and heavy loads by tran- sitioning between discontinuous and continuous conduc- tion based on load conditions. Fig. 2 depicts converter

Applications: Full upward compatibility with SAB 80C515 Up to 24 MHz external operating frequency C 500ns instruction cycle at 24 MHz operation 8K byte on-chip ROM (with optional ROM protection) C alternatively up to 64K byte external program memory Up to 64K byte external data memory 256 byte on-c...

Features: Forced-continuous operation in the TC74VHCT240AF reduces noise and RF interference. Fault protection is provided by an overcurrent comparator that limits output current dur- ing both sourcing and sinking operations. Adjustable compensation allows the transient response to be opti- mized over ...

· TISP7360F3SL

Vendor:SIP-3   Package Cooled:SIP-3   D/C:03+   

Description: Between t7 and t8, the converter reaches its peak current limit which is determined by RPL and VIN. Once the limit is reached, the converter operates in continuous mode with approximately 200mA of ripple current. At time t8, the output voltage is satisfied, and the converter can ser- vic...

Applications: The TISP7360F3SL & TISP7360F3SLE are general purpose broad band Low Noise Amplifiers (LNA) for use in the 0.3-3 GHz frequency range. The LNA provides 15 dB of gain and a 1.5 dB noise figure from a single positive supply of +2.75 to +5.5V. The low noise figure coupled with a high P1dB (22 ...

Features: The unity gain stable TISP7360F3SL is both a mono-BTL audio power amplifier and a Single Ended (SE) stereo headphone amplifier. Operating on a single 1.5V supply, the mono BTL mode delivers 85mW into an 8Ω load at 1% THD+N. In Single Ended stereo headphone mode, the amplifier delive...

· TA4011FU(U3)

Description: LDQM and UDQM control the lower and upper bytes of the I/O buffers. In read mode, LDQM and UDQM control the output buffer. When LDQM or UDQM is LOW, the corresponding buffer byte is enabled, and when HIGH, disabled. The outputs go to the HIGH impedance state when LDQM/UDQM is HIGH. This fu...

Applications: The nominal value of the RF choke L1 is 100 nH. At frequencies below 100 MHz this value should be increased to 220 nH. At frequencies above 1 GHz a much lower value must be used (e.g. 10 nH) to improve return losses. For optimal results, a good quality chip inductor such as the TDK MLG ...

Features: 2 A Output Rating Internal Sequencer for Full or Half-Step Operation PWM Constant-Current Motor Drive Cost-Effective, Multi-Chip Solution 100 V, Avalanche-Rated NMOS Low rDS(on) NMOS Outputs (300 mΩ typical) Advanced, Improved Body Diodes Half-Step and Full-Step Unipolar Dr...

· TC06C060C

· TYN208B

Vendor:ST   Package Cooled:TO-220   D/C:98+   

· TEMSVD1D336M12R

Applications: Vcc = 5.0V10%, TA = 0C to 70C (Normal) unless otherwise specified SymbolParameterTest Condition ILIInput Leakage CurrentVss < VIN < Vcc ILOOutput Leakage Current Vss < VOUT < Vcc /CS1=VIH or CS2=VIL or /OE = VIH or/ WE = VIL IccOperating Power Supply /CS1 = VIL, CS2=VIH, C...

Features: The TEMSVD1D336M12RECTEMSVD1D336M12R9E are 2.5V powered RS-232 compatible transceivers. These devices feature shut- down (TEMSVD1D336M12RE), AutoShutdown Plus™ (TEMSVD1D336M12R8E/ TEMSVD1D336M12R9E), and enhanced electrostatic discharge (ESD) protection integrated into the chip. All tran...

· TC74HC158AFTOS

· TD27C64A-40

Vendor:INTEL   Package Cooled:96+97+   D/C:3150   

· TL7702AID1013TRA365

· TLP621D4GRLF4

Vendor:TOSHIBA   Package Cooled:N/A   D/C:03+   

· T520T156M006ASE100

Vendor:KEMET   Package Cooled:SMD   D/C:06+   

· TC1320EOA

Vendor:MICROCHIP   Package Cooled:SOP-8   D/C:08+   

Description: Input or Output Voltage (DC or Transient) (Referenced to VSS Vin, Vout for Control Inputs and VEE for Switch I/O) Input Current (DC or Transient), per Control PinIin Switch Through CurrentISW Power Dissipation. Per Package**PD Storage TemperatureTstg Lead Temperature (8 - Second Soldering...

Applications: Up to 12 DCM blocks are available. To generate de-skewed internal or external clocks, each DCM can be used to elimi- nate clock distribution delay. The DCM also provides 90-, 180-, and 270-degree phase-shifted versions of its output clocks. Fine-grained phase shifting offers high-resoluti...

Features: n Generates all clock frequencies for Pentium (II), AMD and Cyrix system requiring multiple CPU clocks. n Supports up to16 Synchronous CPU clocks (4 CPU and 12 SDRAM) and 7 Synchronous PCI BUS clocks. n Two 14.318Mhz reference clocks and one 2.5V IOAPIC n One 24Mhz floppy clock and one...

· TMP47C634AN-R572

Description: 6(8)-bit video data (RGB) is input to the Datapath Block supports up to an 85 MHz pixel rate. The data is delayed to align the Column Driver Start Pulse (STH) with the Column Driver data. The data bus (RSR[2:0]P/N, RSG[2:0]P/N, RSB[2:0]P/N) outputs at a 170 MHz rate on 9 differential out...

Applications: Power dissipation in CPLDs can vary substantially depend- ing on the system frequency, design application and output loading. To help reduce power dissipation, each macrocell in a XC9500XL device may be configured for low-power mode (from the default high-performance mode). In addi- tion...

Features: The current signal processing circuit receives inputs from current transformers connected in series with the input lines and the DC bus capacitor. The output of the current signal processing circuit, IFB, is essentially an isolated replica of the inverter input current. An isolated current...

· TISN7414JTISN7414JTISN7414J

· TL7770-12CDW

Description: Hynix HYMD232646A(L)8J-J series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules(DIMMs) which are organized as 32Mx64 high-speed memory arrays. Hynix HYMD232646A(L)8J-J series consists of eight 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epo...

Applications: International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-649...

Features: The TL7770-12CDW and TL7770-12CDW dual power-distribution switches are intended for applications where heavy capacitive loads and short circuits are likely. These devices incorporate in single packages two 135-mΩ N-channel MOSFET high-side power switches for power-distribution systems...

· TWN1142

Vendor:SI   Package Cooled:TO-92   D/C:99+   

· T520B336M006ATE040

· TDSG5157(13MMGREENANODE)

· TDA7072AT/N1

Description: The AHC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory system...

Applications: Pin-compatible upgrade of TMC2242B User-selectable interpolate d.c. gain, 0 dB or -6 dB True unity d.c. gain in all 0 db modes 40 MSPS performance in equal-rate filter modes 40 and 60 MSPS speed grades in all other modes User-selectable 2:1 decimation, 1:2 interpolation, and equal...

Features: The TDA7072AT/N1 is a high speed, low power and 1M bit CMOS SRAM organized as 131,072 words by 8bit. The TDA7072AT/N1 uses high performance CMOS process technology and designed for high speed low power circuit technology. It is particulary well suited for used in high density low power syste...

· TMP4320-7914A

Description: Data Inputs/Outputs: Inputs array data during program operation, when CE# and WE# are active. Data is internally latched during the write and program cycles. When CE# and OE# are active, the output sends array data, manufacturer code or device code. The data pins float to tri-state when t...

Applications: 1. Obtaining fully specified performance from the ADS-119 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (14, 18, and 23) dire...

Features: Each device includes on a single silicon chip a voltage regulator, Hall-voltage generator, small-signal amplifier, chopper stabilization, Schmitt trigger, and a short-circuit protected open-collector output to sink up to 25 mA. A south pole of sufficient strength will turn the output on. ...

· TC531001CF-E576

Vendor:TOS   Package Cooled:1095   D/C:00+   

Description: The Multimode terminator contains all functions required to terminate and auto detect and switch modes for SPI-2, SPI-3 and SPI-4 bus architectures. Single Ended and Differential impedances and currents are trimmed for maximum effectiveness. Fail Safe biasing is provided to insure signal in...

Applications: The output transistor will b switched on (BOP) ine the presence of a sufficiently strong South pole magnetic field facing the marked side of the pack- age. Similarly, the output will be switched off (BRP) in the presence of a weaker South field and remain off with 0 field. The SOT-23 device i...

Features: The phantom clock information is contained in eight registers of 8 bits, each of which is sequentially accessed 1 bit at a time after the 64-bit pattern recognition sequence has been completed. When updating the phantom clock registers, each register must be handled in groups of 8 bits. Writi...

· TPS73733DCQR

Vendor:TI   Package Cooled:SOT-223   D/C:07+   

Description: Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not ...

Applications: 1. Incorporates efficient switching regulator with broad input voltage range VOUT5V0.25IL250mA (13~45V) VIN15~45V 2. Internal data transmission/reception circuits Data can be superposed on the power supply line for transmission. AMI format is used for transmission route coding. 3. In...

Features: ELECTRICAL CHARACTERISTICS Test conditions T amb = C40C to + 85C, VCC = 3.0V to 6.0V. These characteristics are guaranteed by either device characterisation, production test and or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated u...

· TPSMA6.8A-E3

· TDA8114A

Description: Clock: CK and /CK are differential clock inputs. All address and control input signals are sampled on the crossing of the positive edge of CK and negative edge of /CK. Output (read) data is referenced to the crossings of CK and /CK (both directions of crossing).

Applications: NOTES: (1) All devices receive a 1s test. Failure criterion is 5 pulses of 5pC. (2) The voltage rate-of-change across the isolation barrier that can be sustained without data errors. (3) Logic inputs are HCT-type and thresholds are a function of power supply voltage with approximately 0.4V hy...

Features: DCLK 3-wire FSK Interface Data Clock (Schmitt Input/CMOS Output). In mode 0 (when the CB0 pin is logic low) this is a CMOS output which denotes the nominal mid-point of a FSK data bit. In mode 1 (when the CB0 pin is logic high) this is a Schmitt trigger input used to shift the FSK data ...

· TBJA155K006CR

· TA8205H

Applications: This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CP), the Q outputs of the flip-flop...

Features: Lead temperature, Tsol, 1,6 mm (1/16 inch) from case for 10 seconds300C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond tho...

· T491A155M020AT

· TSM1A103J34D3R

Vendor:tks   Package Cooled:0603-10K   D/C:04+   

· TC200G02AF-0022

Vendor:TOSHIBA   Package Cooled:SOP28L   D/C:0251+   

Description: signal Once the input exceeds the squelch requirements carrier sense (CRS) is asserted Receive data (RXD) and receive clock (RXC) become available typically within 6 bit times At this point the digital phase-locked loop has locked to the incoming signal The DP8391 decodes a data frame wi...

Applications: The TC200G02AF-0022/24LC08 is designed for applications requiring up to 1,000,000 programming cycles (BYTE WRITE and PAGE WRITE). It provides 10 years of secure data retention, without power after the execution of 1,000,000 programming cycles.

Features: tions under no signal (open circuit) conditions In addition in the single ended mode a capacitor of 0 001 mF should be connected between the unused input and the ground plane to provide a good high frequency bypass The capacitor should be made larger for lower frequencies

· TM28F020-170FM

Vendor:TI   Package Cooled:STK   D/C:0512+   

· TK11131CSL

Vendor:TOKO   Package Cooled:SOT23-5   D/C:N/A   

· TAJR224M035RNJ

Vendor:AVX   Package Cooled:SMD   D/C:06+   

· TMS0537NLTMS0537NLTMS0537NL

· TMS320VC5410AZGU120

Vendor:TI   Package Cooled:N/A   D/C:2006+   

· TMP87CH38F-3418

· TTHF1896

Description: A set of eight configuration registers are provided to control various functions of the PC87334 These registers are ac- cessed using two 8-bit wide index and data registers The ISA I O address of the register pair can be relocated using a power-up strapping option

Applications: Add to the Interrupt Acknowledge Bus Cycles section on page 3-36: Level sensitive interrupts must remain asserted until the corresponding IACK cycle; otherwise, a spurious interrupt exception may result or the inter- rupt may be ignored entirely. This is also true for level sensitive extern...

Features: The TTHF1896 is a 12-bit, high speed, low power, succes- sive-approximation ADC. The part operates from a single 2.7 V to 5.5 V power supply and features a conversion time of 2 µs. The part contains a two channel multiplexer and track/hold amplifier which can handle input frequen- c...

· TR88200CG130

· T74LS174B

Vendor:SST   Package Cooled:DIP   D/C:98+   

Description: Description Agilent Technologies MGA-52543 is an economical, easy-to-use GaAs MMIC Low Noise Amplifier (LNA), which is designed for use in LNA and driver stages. While a capable RF/microwave amplifier for any low noise and high linearity 0.4 to 6 GHz application, the LNA focus is Ce...

Applications: Hynix HYMD232G726A(L)8M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD232G726A(L)8M-M/K/H/L series consists of nine 32Mx8 DDR SDRAM in 400mil TSOP II pack...

Features: The operating speed of each receiver and transmitter can be selected independently from one of 22 fixed baud rates, a 16X clock derived from one of two programmable baud rate counters or one of three external 16X clocks (1 available at 1x clock rate). The baud rate generator and counter c...

· TLV5638CD

Description: Nonmultiplexed address bus Processor operates at the clock input frequency On the Am186ES/ESLV microcontroller, 8-bit or 16-bit memory and I/O static bus option n Enhanced integrated peripherals provide increased functionality, while reducing system cost

Applications: A simple LC noise reduction filter (L5 and C7) is connected between pins 1 (IFFLT1 ) and 28 (IFFLT2) to reduce the noise contribution from the earlier stages of the logathrimic amplifier. The LC filter helps to reduce the bandwidth of the log amplifier from approximately 45MHz to typica...

Features: OVP pin reports the event of an over-voltage condi- tion . Converter output rising 15% more than the DAC- set voltage triggers a high output on this pin with a typical 30mA sourcing capability which can be used to drive an external device and disables PWM gate drive circuitry.

· TMS9995-12

Description: NOTES 1. Data inputs have internal pull-up resistors to enable them to be driven from TTL outputs. 2. All counters have outputs directly synchronous with their respective clock rising edges. 3. The finite output resistance of the internal voltage follower and on resistance of the sample swit...

Features: As the SI pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge- coupled output amplifier that generates a voltage on the analog output AO. Two dummy pixel values are shifted out first, then the 128 actual pixel bits, ...

· TN20-3W472KT

Vendor:MITSUBISHI   Package Cooled:/   D/C:/   

· TIS596287552O1RATIS596287552O1RATIS596287552O1RA

· TC9053

Vendor:DIP   Package Cooled:TOSHIBA   D/C:04+   

Description: 1. diF/dt - Rate of change of current through zero crossing 2. IRRM - Peak reverse recovery current 3. trr - Reverse recovery time measured from zero crossing point of negative going IF to point where a line passing through 0.75 IRRM and 0.50 IRRM extrapolated to zero current

Applications: Horizontal This output produces only true H pulses of nominal width 5µs. The leading edge is triggered from the leading edge Sync Output of the input H sync, with the same prop. delay as the composite sync. The half line pulses present in the input signal during vertical blanking are...

Features: The following are trademarks of Conexant Systems, Inc.: Conexant™, the Conexant C symbol, and Whats Next in Communications Technologies™. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-part...

· TMX73CE167NJ

Description: Wide inductance range in small package. Flame retardant coating. Electromagnetic shield-finest shield available. Epoxy molded construction provides superior moisture protection. • Precision performance, excellent reliability, sturdy construction.

Applications: ARCHITECTURAL ADVANTAGES Simultaneous Read/Write operations - Data can be continuously read from one bank while executing erase/program functions in other bank - Zero latency between read and write operations Multiple bank architectures - Three devices available with different ban...

Features: The TMX73CE167NJ is part of a complete GSM/EDGE receive and transmit chipset. Other components in this chipset are: RF to IF amplifier/mixers, receive and transmit frequency hopping synthesizers, and a baseband to IF transmit modulator and ramping chip.

· TDA9570H/N1/AI1088

Description: technology available in DIP and SOP packages. The HCF4053B analog multiplexer/demultiplexer is a digitally controlled analog switch having low ON impedance and very low OFF leakage current. This multiplexer circuit dissipate extremely low quiescent power over the full VDD - VSS and VDD ...

Applications: Typical specifications represent average readings at 25C and VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal be...

Features: The ispLSI 1032E is a High Density Programmable Logic Device containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLS...

· TA-6R34R7TCML-M-PR

Description: Support for simultaneous operation of all above devices. (only one at a time of each of the following groups supported: CF or ATA drive, SM or XD or NAND, SD or MMC) On-Chip 4-Bit High Speed Memory Stick and MS PRO Hardware Circuitry On-Chip firmware reads and writes High Speed Memory Stick...

Applications: The TA-6R34R7TCML-M-PR is a 8-bit, 2-port bus switch designed with a low ON resistance (5Ω) allowing inputs to be connected directly to outputs. The bus switch creates no additional propagational delay or additional ground bounce noise. The switches are turned ON by the Bus Enable (B...

Features: TA-6R34R7TCML-M-PR series require a capacitor from VOUT to GND to provide compensation feedback to the internal gain stage. This is to ensure stability at the output terminal. Typically, a 10uF tantalum or 50uF aluminum electrolytic is sufficient. Note : It is important that the ESR for thi...

· TA6R34R7TCMLMPR

Vendor:SMD   Package Cooled:FUJITSU   D/C:05+   

· TSM104WAIN

Vendor:st   Package Cooled:07+   D/C:78000   

Description: The manual reset input (MR) allows other reset sources, such as a manual reset switch, to generate a processor reset. The input is effectively debounced by the timeout period (200 ms typical). The MR input is TTL/CMOS compatible, so it may also be driven by any logic reset output.

Applications: The FLASH370i family of CMOS CPLDs are fully compliant with the PCI Local Bus Specification published by the PCI Special Interest Group. The simple and predictable timing model of FLASH370i ensures compliance with the PCI AC specifications independent of the design. On the other hand, in ...

Features: These parts are in production but have been determined to be LAST TIME BUY. This classification indicates that the product is obsolete and notice has been given. Sale of this device is currently restricted to existing customer applications. The device should not be purchased for new design app...

· TDA8767H/2

Vendor:PHILIPS   Package Cooled:800   D/C:01+   

Description: Isolated Hermetic Package, JEDEC TO-257AA Outline Output Voltages: 5V, 12V, 15V (Other Voltages Available) Output Voltages Set Internally To 1% or 2% Built-In Thermal Overload Protection Short Ciruit Current Limiting Product Is Available Screened To OM803

Applications: (3) LUMINANCE SENSOR CONTROL The luminance sensor control circuits consist of the power supply for sensor and the A/D converter. The A/D converter senses the voltage on the SENS terminal and selects 1 out of 8 registers (PWM REGISTER 0C7). And the data in the selected register is reflecte...

Features: When the power supply of the TDA8767H/2 is off while the twisted-pair cables are connected, the TDA8767H/2 transmitter and receiver circuitry present a high-impedance signal to the cable that does not load the device at the other end of the cable.

· TPS3808G09DBVT

Vendor:TI   Package Cooled:SOT23-6   D/C:08+   

Description: 1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximumCrated conditions is not impl...

Applications: ¡In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using a...

Features: The TPS3808G09DBVTAK (NTSC) and TPS3808G09DBVT (PAL) are 250,000/ 290,000-pixel CCDs for 1/4-inch opti- cal system color video cameras and are upwardly compatibly replacements for the current ICX086AK and ICX087AK products. The TPS3808G09DBVT8AK (NTSC) and TPS3808G09DBVT9AK (PAL) are 38...

· TP2248

Vendor:DIP   Package Cooled:.   D/C:03+   

Description: sFEATURES q PWM switching control q Operating Voltage(3.6 to 32V) q Wide Oscillator Range(5 to 350 kHz) q ON/OFF Circuit(High Active) q Current Sensing Amplifier q Soft-Start Function q UVLO(Under Voltage Lockouts) q Bipolar Technology q Package OutlineDIP14, DMP14, SSOP10

Features: The instruction set consists of 51 instructions with three formats and seven address modes. Each instruction can operate on word and byte data. Table 1 shows examples of the three types of instruction formats; the address modes are listed in Table 2.

· TLP181(GR-TPLFT)46

· TPSE227M010R0060

Description: Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damag...

Applications: The Hitachi HN27C101AG/HN27C301AG is a 1-Mbit ultraviolet erasable and electrically programmable ROM. This device is packaged in a 32-pin dual-in-line package with transparent lid. The transparent lid allows the memory content to be erased with ultraviolet light, whereby a new pattern can the...

Features: Free PSoC "Tele-training" is available for beginners and taught by a live marketing or application engineer over the phone. Five training classes are available to accelerate the learning curve including introduction, designing, debugging, advanced design, advanced analog, as wel...

· TPS3803G15QDCKRQ1

Description: Recommended wire bonding uses 3 mils wide and 0.5 mil thick gold ribbon with lengths as short as practical allowing for appropriate stress relief. The RF input and output bonds should be typically 0.012" long corresponding to a typical 2 mil gap between the chip and the substrate mater...

Applications: The COP424C COP425C COP426C COP444C and COP445C fully static Single-Chip CMOS Microcontrollers are members of the COPSTM family fabricated using dou- ble-poly silicon gate microCMOS technology These Con- troller Oriented Processors are complete microcomputers containing all system timing ...

Features: The Hynix TPS3803G15QDCKRQ1 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The Hynix TPS3803G15QDCKRQ1 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the...

· TA7291ST

· T491S155K020AS

Vendor:S   Package Cooled:KEMET   D/C:08+   

Description: The memory cell outputs Q and Q use ground and VCC levels and provide continuous, direct control. The addi- tional capacitive load together with the absence of address decoding and sense amplifiers provide high stability to the cell. Due to the structure of the configuration memory cells,...

Applications: The T491S155K020AS is a transimpedance preamplifier for 1.25Gbps LAN fiber optic receivers. The circuit features 200nA input-referred noise, 920MHz bandwidth, and 1mA input overload. The T491S155K020AS provides a pin-for-pin compatible solu- tion for communications up to 2.5Gbps. It features ...

Features: The T491S155K020AS firmware implements a cooperative, multitasking host adapter that provides the host system with complete SCSI command and data transport capabilities, thus freeing the host system from the demands of the SCSI bus protocol. The T491S155K020AS firmware provid...

· TLSE180P

Vendor:.   Package Cooled:.   D/C:07+   

· TA8725ANT

· TI084CN

Vendor:ST   Package Cooled:DIP-14   D/C:2008   

· TAJA474M025B

· TPC8401(TE12L)

Vendor:TOS   Package Cooled:SO-8   D/C:04+   

Description: sGENERAL DESCRIPTION The NJU7042 is a single C-MOS operational amplifier permitting input and output in full swing. The operating voltage is 2.7V to 5.5V and the input and output stage permits signal to swing between both of the supply rails. The input offset voltage is lower than 5mV, ...

Applications: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. This high-speed, low power transceiver is ideal for asynchro- nous communication between two busses (A and B). The Direction and Output Enable controls are designed to operate this device as either two indepen...

Features: come high impedance and the VAG Ref pin is pulled to the VDD power supply with a nonClinear, highCimpedance circuit. The device will operate normally when a logic 1 is applied to this pin. The device goes through a powerCup sequence when this pin is taken to a logic 1 state, which prevent...

· THS4121IDGK

Description: System Considerations The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, I CC, has three seg- ments that are of interest to the system designer: the standby current level, the active current level, and transient cu...

Applications: Network Systems Programmable Current Slew Rate Power Supply Sequencing Sense Resistors Set Peak Current (IMAX) Overcurrent Circuit Breaker at 2 IMAX Precharge Output Logic Low Power Good Output Logic Low Enable Input On-Chip Charge Pump Low Sleep Mode Current Undervoltage Lockout (UVLO) ...

Features: The THS4121IDGK provides all the control functions for a series parallel resonant converter as well as a pulse width mod- ulation (PWM) controller to develop a supply voltage. Typical operating frequency range is between 30kHz and 250kHz, depending on the CCFL and the transformer's characteris...

· TIF340AS

Description: Note: 1. The inductor L2 is recommended to isolate the 5V ipower supply from current surges caused by the MOSFET switching. This inductor is not required for the proper operation of the DC-DC converter and can be substituted with a ferrite beads inductor or omitter completely.

Applications: HIGH SPEED: tPD = 5.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25C TYPICAL HYSTERESIS: Vh = 1V at VCC = 4.5V POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERAT...

Features: 400kbps 2-Wire Serial Interface 3V to 5.5V Operation Drive 4 Digits plus 4 or 8 Discrete LEDs Drive Common-Cathode LED Digits 23mA Constant-Current LED Segment Drive Hexadecimal Decode/No-Decode Digit Selection 64-Step Digital Brightness Control Slew-Rate-Limited Segment Drivers Reduced EMI...

· TMF528C0032A

Vendor:DSP   Package Cooled:0641+   D/C:QFP   

· TXC26800MHZ

· T494

Description: BRAKE. When the BRAKE input goes Low the output source driv- ers are disabled and the gates of the sink drivers are pulled high and left floating. This achieves optimum passive braking performance since the sink power DMOS output drivers are ON until the motor has fully completed braking...

Applications: COL[2]; Disables Management Interface and selects the Full Duplex operating mode (normal or enhanced). Default is normal full duplex mode. If the enhanced Full- Duplex mode is selected, the functions of pins 89, 90, 92, 93, and 94 are also changed. See the descriptions in Sectio n3.3.13 and...

Features: The T494 is an optimized LNA/Mixer IC for dual-band tri-mode applications. It provides a receiver front-end for cellular CDMA/AMPS and GPS functions on a single chip. The LNAs/Mixers for both bands are designed for high gain, high linearity, and low noise figure with flexible optimization o...

· TLHY4400

Vendor:.   Package Cooled:tfk   D/C:dc00   

Description: Typical Operating Current:11 mA at 3V Typical Power-down Current: 1 A Temperature Ranges: Commercial (0C to +70C), Industrial (-40C to +85C) Option: Extended Range (-55C to +125C) Packages: PDIL 40, PLCC 44 and VQFP 44, CDIL 40 and CQPJ 44 with Window Options: Known Good Dice and Cerami...

Applications: High performance: Chained (back-to-back) packet handling with no CPU intervention: Queues transmit packets Queues receive packets Full duplex operation for higher network throughput Stores results in memory along with packet Queues Ethernet and modem interrupts Opti...

Features: SHDN (Pin 4): The SHDN pin is used to put the TLHY4400 in shutdown mode. Tie to ground to shut down the TLHY4400. Tie to 2.3V or more for normal operation. If the shutdown feature is not used, tie this pin to the VIN pin. SHDN also provides a soft-start function; see the Applications Infor- m...

· TLV320AIC19IRHBR

Vendor:TI   Package Cooled:N/A   D/C:06+   

Description: RXCLK is the clock output bit clock. This clock is used to transfer Header information and data through the RXD serial bus to the network processor. This clock reflects the bit rate in use.RXCLK will be held to a logic 0 state during the acquisition process. RXCLK becomes active when ...

Applications: The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions. Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the users own r...

Features: The constant output voltage can be selected for 2, 3 or 4 series Li-Ion cells with 0.5% accuracy over temperature. It can also be programmed between 4.2V +5% per cell and 4.2V -5% per cell to optimize battery capacity. When supplying the load and battery charger simultaneously, the input curr...

· TQ3632

Vendor:TRIQUINT   Package Cooled:N/A   D/C:9+   

· T1451N

Description: Specified Performance High Speed Mode: SCL = 3.4MHz Fast Mode: SCL = 400kHz Standard Mode, SCL = 100kHz High Speed Mode: SCL = 3.4MHz Fast Mode: SCL = 400kHz Standard Mode, SCL = 100kHz High Speed Mode: SCL = 3.4MHz Fast Mode: SCL = 400kHz Standard Mode, SCL = 100kHz SCL Pulled H...

Applications: Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation, the device voltage and current must not exceed the maximum operating values specified in the table on page one. Bias Conditions should also satisfy the following expression:

Features: The T1451N consists of eight D-type transparent latches with 3-state true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes.

· TDA8932BTW

Vendor:N/A   Package Cooled:N/A   D/C:09+   

Description: When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. Th...

Applications: The Current Limit Sense Voltage is measured by connecting an adjustable 0-to-1V floating power supply in series with the current limit terminal and referring it to either the ground or the Vin terminal. Set the duty cycle to 90% and monitor test point TP5 while adjusting the floating powe...

Features: † TDA8932BTWI equivalent no. 4040065. ‡ Models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2000 pieces of TDA8932BTWE/2K will get a single 2000-piece tape and reel.

· TOL-30BHOADAA

Vendor:.   Package Cooled:.   D/C:07+   

· TMS370C340

Vendor:TI   Package Cooled:270   D/C:01+   

Description: Description: Mitsubishi IGBT Modules are de- signed for use in switching applica- tions. Each module consists of two IGBTs in a half-bridge configuration with each transistor having a re- verse-connected super-fast recov- ery free-wheel diode. All compo- nents and interconnects are...

Applications: Address Inputs A0CA10 Row Addresses A0CA7 Column Addresses A10 Automatic-Precharge Select Bank Select Column-Address Strobe Clock Enable System Clock Chip Select SDRAM Data Input/Output Data/Output Mask Enables No Connect Row-Address Strobe Power Supply (3.3-V Typ) Power Sup...

Features: The transmitter sections utilize 1310nm Surface Emitting InGaAsP LEDs. These LEDs are packaged in the optical subassembly portion of the transmitter section. A custom silicon IC that converts differential PECL logical signals into an analog LED driving current then drive it.

· TP5016T

· TLP491

Vendor:TOSHIBA   Package Cooled:DIP   D/C:02+   

· TPS650243RHBT

· T452TE

· TC40H11P

Description: Average Rectified Current .375 " lead length @ TA = 75C Peak Forward Surge Current 8.3 ms single half-sine-wave Superimposed on rated load (JEDEC method) Total Device Dissipation Derate above 25C Thermal Resistance, Junction to Ambient

Applications: AH,BH,CH - Are the highside logic level digital inputs. These three inputs control the three highside bridge transistors. Un- less the deadtime is disabled by connecting SWR to ground, the lowside input of each phase will override the corresponding highside input. If SWR is the lowside in...

Features: The TC40H11P contains two separate UVLO com- parators to monitor the bias (VCC) and conver- sion (VIN) voltages independently. The VCC UVLO threshold is internally set to 4.25V, whereas the VIN UVLO threshold is program- mable through the UVIN pin. When the voltage on the UVIN pin is...

· TEESVB21A336M

· TAZB684M020CR

· TK71729SCLH

Description: 4.4.3.1 Group C sample selection. Samples for subgroups in group C shall be chosen at random from any inspection lot containing the intended package type and lead finish procured to the same specification which is submitted to and passes group A tests for conformance inspection. Testing of...

Applications: The receive cell data to the ATM layer from the receive FIFO. This is updated on the rising edge of RFCLK. RDAT[7:0] is tristated if TSEN is asserted or if MPHYEN is asserted. In UTOPIA single-phy mode, it is driven if RRDENB is asserted (TSEN also asserted) or always driven if TSEN is low....

Features: The following specifications apply for V+ = +3.0 VDC to +3.6 VDC, and all analog source impedance RS = 50 Ω unless other- wise specified in the conditions. Boldface limits apply for TK71729SCLHCIMT TA = TJ = TMIN=0˚C to TMAX=85˚C; all other limits TA = +25˚C. TA is the ...

· TLP621-4435

· TL062ST

Vendor:ST   Package Cooled:ORG PACKING   D/C:08+   

Description: Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or u...

Applications: I Embedded 16 bit CompactRISCTM Micro Controller. (CR16B) with programmable clock speeds. I 384 kbyte Flash. I ACCESSBUSTM or MICROWIRETM interfaces I 6 kilobyte on-chip Data Memory. I One full duplex ADPCM transcoder. I On-chip 14-bit linear CODEC. I 14 upto 44 dB gain differenti...

Features: When used in the Long Frame Sync or Short Frame Sync mode, this pin accepts an 8 kHz clock, which synchronizes the input of the serial PCM data at the DR pin. FSR can be asynchronous to FST in the Long Frame Sync or Short Frame Sync modes. When an ISDN mode (IDL or GCI) has been selecte...

· TC7SU04F(E6)

Description: Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without ...

Applications: Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Per TTL driven input (control inputs only); A and B pins do not contribute to ICC.

Features: The TC7SU04F(E6)Cprovides the complete power conversion function for a 3hp (2.2kW) variable-frequency, variable-voltage, AC motor controller. The combines a power assembly IRPT2051A with a Driver-Plus Board IRPT2051D. Figure 1 shows the block diagram of the within an AC motor control s...

· T494E476K025AS

Vendor:KEMET   Package Cooled:E7.3*4.3*4.3   D/C:08+PB/ROHS   

· TD1501

· TEA1506T01

Vendor:PHI   Package Cooled:SOP-3.9-14P   D/C:06+   

Description: Transmitter Section The transmitter section includes the Transmitter Optical Sub- assembly (TOSA) and laser driver circuitry. The TOSA, containing an 850 nm VCSEL (Vertical Cavity Surface Emitting Laser) light source, is located at the optical interface and mates with the LC opti...

Applications: TIMER PINCCTIMING CONTROL Internal Oscillator Default Frequency, fTIMERINT (Not Seen at Pin) External/Internal Selection Threshold, VTIMERTHEI High Trip Threshold, VTIMERTHH Low Trip Threshold, VTIMERTHL Pull-Down Current, ITIMERDN Pull-Up Current, ITIMERUP Start-Up Current, ITIMERSTART

Features: Internally, the TEA1506T01 consists of a sensor core and an image flow processor. The sen- sor core functions to capture raw Bayer-encoded images that are input into the IFP as shown in Figure 1. The IFP processes the incoming stream to create interpolated, color- corrected output and contro...

· TEESVP0J225M8RMSY2.2UF6.3V-0805PB-FERR

· T84C41AM-6

Description: Logic Ground Isolation-TTL/TTL, TTL/CMOS, CMOS/ CMOS, CMOS/TTL EIA RS 232C Line Receiver Low Input Current Line Receiver-Long Lines, Party Lines Telephone Ring Detector 117 VAC Line Voltage Status Indication-Low Input Power Dissipation Low Power Systems-Ground Isolation

Applications: The JTAG translator feature allows you to access the JTAG TAP and state signals when either the USER0 or USER1 instruction is issued to the JTAG TAP. The USER0 and USER1 instructions bring the JTAG boundary scan chain (TDI) through the user logic instead of the MAX II devices boundary scan...

Features: This CMOS device is designed for switching PCM-encoded voice or data, under microprocessor control, in a modern digital exchange, PBX or Central Office. It provides simultaneous connections for up to 256 64kbit/s channels. Each of the eight serial inputs and outputs consist of 32 64kb...

· TPS76338DBVRG4

Vendor:TI   Package Cooled:N/A   D/C:2006   

Description: Reader Response: Conexant strives to produce quality documentation and welcomes your feedback. Please send comments and suggestions to conexant.tech.pubs@conexant.com. For technical questions, contact your local Conexant sales office or field applications engineer.

Applications: Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V, control inputs only); A and B pins do not contribute to Icc. 4. This ...

Features: All commands to the TPS76338DBVRG4 are preceded by the start condition, which is a HIGH to LOW transition of SDA while SCL is HIGH (tHIGH). The TPS76338DBVRG4 continuously monitors the SDA and SCL lines for the start condition and will not respond to any command until this condi- tion is...

· TC5118165BFT-70

Description: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sec- tions of this specification is not i...

Applications: Electrical Characteristics / Ta=25C Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Cutoff Voltage Forward Transfer Admittance Static Drain to Source on State Resistance Input Capacitance Output Capacitance Reverse Transfer Capa...

Features: Continuous Drain Current, V GS @ 4.5V Continuous Drain Current, V GS @ 4.5V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ‚ Junction and Storage Temperature Range

· TMP86CH29AF-1A67

Vendor:TOSHIBA   Package Cooled:1200   D/C:01+   

Description: C. These materials are solely intended for a customer's individual use. Therefore, without the prior written approval of Panasonic, any other use such as reproducing, selling, or distributing this material to a third party, via the Internet or in any other way, is prohibited.

Features: The SIE allows the TMP86CH29AF-1A67 series to communicate with the USB host through the USB repeater portion of the hub. The SIE handles the following USB bus activity independently of the hub microcontroller: • Bit stuffing/unstuffing • Checksum generation/checking

· TP3054WM

Description: The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C (Note 8). VS = 5V, VCM = 0V unless otherwise noted. For the programmable current option (TP3054WMS6 or TP3054WMA), the ISET pin must be connected to V C through 75&#...

Applications: 3.7 UTP Transmission and Output Driver The UTP transmission circuit takes the Manchester decoded data and converts it into a coded format that meets IEEE 802.3-required transmission templates. The coded data is fed into an oversampling D/A and filters for waveform shaping. The output buffer ...

Features: The TP3054WM provides two outputs C a standard 50% duty cycle divider output, and a momentarily pulsed output. The pulse output is useful for audibly or visually signalling the beginning of a time period, or as a trigger for other circuitry. Refer to the Example Applications section fo...

· TLC2274ACN

Description: SMDI will provide the detailed layout (AutoCad format) to users wishing to use the exact same layout and PCB material shown in the following circuits. The circuits recommended within this application note were designed using the following PCB stack up:

Applications: The zero flags for the left and right channels are brought out at connector CN103. ZFGL is the zero flag for the left channel, while ZFGR is the zero flag for the right channel. Refer to the PCM1742 data sheet for detailed information regarding the zero-flag outputs.

Features: See SOA curves or consult factory for appropriate derating. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%, with 100 ppm/C or better temperature stability.

· TDA9974AEL/8

Description: move one resistor segment towards the VH/RH terminal. Similarly, for each SCL clock pulse while SDA is LOW, the selected wiper will move one resistor segment towards the VL/RL terminal. A detailed illustration of the sequence and timing for this operation are shown in Figures 5 and 6 r...

Applications: The Si6924AEDQ is a dual n-channel MOSFET with ESD protection and gate over-voltage protection circuitry incorporated into the MOSFET. The device is designed for use in Lithium Ion battery pack circuits. The common-drain contsruction takes advantage of the typical battery pack topology, ...

Features: Leads are Readily Solderable Lead and Mounting Surface Temperature for Soldering Purposes: 220C Max. for 10 Seconds, 1/16 from case Shipped in plastic bags, 1000 per bag Available Tape and Reeled, 5000 per reel, by adding a RL suffix to the part number Polarity: Cathode Indicated by Pol...

· TD501

· T4066B

Description: Operating voltage VCC: 2.4~5.5V Low power consumption C Operating: 5mA max. C Standby: 10µA max. User selectable internal organization C 1K(HT93LC46): 128 8 or 64 16 C 2K(HT93LC56): 256 8 or 128 16 C 4K(HT93LC66): 512 8 or 256 16 Three-wire Serial Interface

Applications: The T4066B may be powered by dual supplies, a 3.3-V supply for I/O and a core voltage supply. The core voltage supply is supplied to the PLLVDD-CORE and DVDD-CORE terminals to the requirements in the recommended operating conditions section of this data sheet. The PLLVDD-CORE terminals must...

Features: NATURAL LOOPBACK When the T4066B is transmitting and not receiving on the twisted pair media, data on the TXD pins is looped back onto the RXD pins. During a collision, data from the RXI pins is routed to the RXD pins. The natural loopback function can be enabled through register bit MR16.10.

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