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· 0.5W12V

Vendor:COS   Package Cooled:DO-35   D/C:07+   

Description: Single Read Accesses A read access is initiated when the following conditions are satisfied at clock rise: (1) CEN is asserted LOW, (2) CE1, CE2, and CE3 are ALL asserted active, (3) the Write Enable input signal WE is deasserted HIGH, and (4) ADV/LD is asserted LOW. The address presented to...

Applications: • Layer 2 priority encoding (802.3p) (up to 16 priority queues) • VLAN tagging (IEEE 802.3q) • Flow control (IEEE 802.3x) • Link aggregation (IEEE802.3ad) • Multiple power modes with programmable low power operation • Low power design C 3.3 V/1.8 V, 0.18 ...

Features: drivers to drive either 3.3V or 2.5V output levels while the device logic and the output current drive is always pow- ered from 3.3V. The output drivers also provide individually programmable edge rates and open drain capability. A programmable pullup resistor is provided to tie off un- ...

· 0.5W2.4V

Vendor:COS   Package Cooled:DO-35   D/C:07+   

Description: 1. Stresses above those listed under the Absolute Maximum Ratings may cause permanent damage to the device. Functional operation of the device at these or at any other conditions above those indicated in the operational sections of this specifica tion is not implied (while programming, fo...

Applications: The ISL9V2040D3S, ISL9V2040S3S, and ISL9V2040P3 are the next generation ignition IGBTs that offer outstanding SCIS capability in the space saving D-Pak (TO-252), as well as the industry standard D²-Pak (TO-263) and TO-220 plastic packages. This device is intended for use in automotiv...

Features: a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied.

· 0.5W4.7V

Vendor:COS   Package Cooled:DO-35   D/C:07+   

Description: All digital clocks generate unwanted energy in their harmonics. Conventional digital clocks are square waves with a duty cycle that is very close to 50%. Because of this 50/50 duty cycle, digital clocks generate most of their harmonic energy in the odd harmonics, i.e., third, fifth, seven...

Applications: The 0.5W4.7V is an advanced CMOS dualCindependent DPDT (double poleCdouble throw) analog switch, fabricated with silicon gate CMOS technology. It achieves highCspeed propagation delays and low ON resistances while maintaining CMOS lowCpower dissipation. This DPDT controls analog and digi...

Features: The radiation hardened 0.5W4.7VRH is a low dropout adjustable negative regulator with an output voltage range of -2.25V to -26V. The device features a 1A output current capability, an adjustable current limit pin (ILIM) and a shutdown pin (SD) for easy on/off control.

· 0027SB002

Description: Notes: 7. Test conditions assume signal transition time of 3 ns or less, timing reference levels of VCC(typ)/2, input pulse levels of 0 to VCC(typ), and output loading of the specified IOL/IOH and 30-pF load capacitance. 8. At any given temperature and voltage condition, tHZCE is less tha...

Applications:

Features: Upon the detection of power (UVLO), thermal, or short-circuit faults, the 0027SB002 is forced into an idle state where the SS and COMP pins are pulled low and both switches are held off. In the event of UVLO fault, the 0027SB002 remains in this idle state until the UVLO fault is removed...

· 0033SB

Description: The SPI protocol is controlled by op-codes. These op-codes specify the commands to the part. After /CS is activated, the first byte transferred from the bus master is the op-code. Following the op-code, any addresses and data are then transferred. Certain op- codes are commands with no ...

Applications: optimized for use in many industrial and com- mercial applications where low power and low voltage operation are essential. By popular mi- crocontroller, the versatile serial interface in- cluding chip select (CS), serial clock (SK), data input (DI) and data output (DO) can be easily control...

Features: The inputs to the PIM consist of all I/O and dedicated input pins and all macrocell feedbacks from within the logic blocks. The number of PIM inputs increases with pin count and the number of logic blocks. The outputs from the PIM are signals routed to the appropriate logic blocks. Each l...

· 0050-8064A

Description: VCORE+ VCORE Output Sense. Differential sensing of the output voltage. Used for regulation as VCOREC well as PGOOD, under-voltage and over-voltage protection and monitoring. A resistor in series with this VCORE+ sets the output voltage droop.

Applications: CLKA/CLKB (Pins 5, 16): Card Socket. The CLKA/CLKB pins should be connected to the CLK pins of the respective card sockets. The CLKA/CLKB signals are derived from the CLKIN pin. They provide a level shifted CLKIN signal to the selected card. The CLKA/CLKB pins are gated off until VCCA/VCCB at...

Features: The 0050-8064A, 0050-8064A, 0050-8064A, 0050-8064A, and 0050-8064A are current feedback amplifiers with a bandwidth of 200MHz and operate from just 0.75mA supply current. This makes these amplifiers ideal for todays high speed video and monitor applications.

· 0050-8115A

Vendor:300   Package Cooled:COHERENT   D/C:PLCC44   

Description: Vo1/Vo2 Loading The output voltages from the 0050-8115A series regulators are independently regulated. The voltage at Vo1 is produced by a highly efficient switching regulator. The lower output voltage, Vo2, is derived from Vo1. The regulation method used for Vo 2 also provides control of ...

Applications: Note: 1. These are the recommended and tested operating conditions. Proper device operation outside of these conditions is not guaranteed. 2. This voltage is the input to the filter discussed in 0050-8115A RISC 0050-8115Aicroprocessor Hardware Specifications, Section 1.9.2, PLL Power Su...

Features: 1.1 Program Memory Organization The TLC154/155 have a 9-bit Program Counter (PC) capable of addressing a 51213 program memory space. The TLC156 have a 10-bit Program Counter capable of addressing a 1K13 program memory space. The TLC157 have an 11-bit Program Counter capable of addressing a 2K...

· 0050-8345A

Vendor:LSI   Package Cooled:N/A   D/C:09+   

Description: Note 1 Output matching is calculated as the percent variation (IMAX a IMIN) 2 Note 2 With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another Maximum brightness input current can be 2 mA as long as Note 3 and junction temperature eq...

Applications: Figure 5 shows the power curves for a power amplifier with 40V supplies and an 8Ω resistive load. Again, powers are plotted with respect to the percentage of maximum voltage output. As with dc, the power delivered from the power supply increases linearly with output voltage and the ...

Features: The #RESET input pin can be used in some application. When #RESET pin is at high state, the device is in normal operation mode. When #RESET pin is at low state, it will halt the device and all outputs will be at high impedance state. As the high state re-asserted to the #RESET pin, the device...

· 00677DT

Vendor:SIPEX   Package Cooled:N/A   D/C:09+   

Description: A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and in...

Applications: NOTES: 1. Dimensions are in inches. Metric equivalents are given for general information only. 2. Beyond radius (r) maximum, TW shall be held for a minimum length of .011 inch (0.28 mm). 3. Dimension TL measured from maximum HD. 4. Outline in this zone is not controlled. 5. Dimension CD sha...

Features: The nominal output impedance of the 00677DT with Pin 19 grounded has been trimmed to 100 Ω, 1%. Other output im- pedances can be generated with an external resistor, REXT, be- tween Pins 19 and 20. An REXT equalling 300 Ω will yield a total output resistance of 75 Ω, while...

· 00713FE

Vendor:SIPEX   Package Cooled:N/A   D/C:09+   

Description: CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9748 features proprietary ESD protection circuitry, permanent damage may occur on devic...

Applications: The current drive capability of the buffered Tx and Ty outputs exceeds 100 mA. If a wiring fault causes a short from these pins to VCC (or to a buffered bus supply when using different supplies) then high dissipations result when Sx or Sy are driven low. The rated 300 mW dissipation can b...

Features: The 00713FE is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flo...

· 00743849A

Description: Cycle time=1µs,100% duty IOUT=0mA,CE0.2V,ZZ=VIH, VIN0.2V or VINVcc-0.2V Cycle time=tRCmin,100% duty IOUT=0mA,CE=VIL,ZZ=VIH, VIN=VIL or VIH CE=VIH,ZZ=VIH, Other inputs=VIL or VIH CEVcc-0.2V,ZZVcc-0.2V, VIN0.2V or VINVcc-0.2V ZZ0.2V, VIN0.2V or VINVcc-0.2V

Applications: Notes: 1. The anode side of the device is denoted by a hole in the lead frame. Electrical insulation between the case and the board is requiredslug of device is not electrically neutral. Do not electrically connect either the anode or cathode to the slug. 2. All dimensions are in millimete...

Features: Output Threshold Adjust The state of the OUT pin is driven by a voltage comparator whose output state depends on the level of the input voltage on the sample capacitor and the level of an adjustable 8-bit threshold voltage. The threshold is adjusted by shifting data bits into the D/A Regis...

· 009-0016908A

Vendor:NCR   Package Cooled:QFP128   D/C:07+   

Description: • High-speed switching (tstg: storage time/tf: fall time is short) • Low collector to emitter saturation voltage VCE(sat) • Superior forward current transfer ratio hFE linearity • Allowing automatic insertion with radial taping

Applications: The 009-0016908A/009-0016908A are fully integrated analog interfaces for digitizing high-resolution RGB graphics signals from PCs and workstations. With a sampling rate capability of up to 110/140 MHz, it can accurately support display resolutions up to 1280x1024 (SXGA) at 60/75Hz. The clamp...

Features: Applying a LOW to the INIT input causes an immediate load of the programmed initialize word into the master and slave flip-flops of the register, independent of all other inputs, including the clock (CP). The initialize data will appear at the device outputs after the outputs are enabled by br...

· 01261-0

Vendor:3950   Package Cooled:CIDCO   D/C:09+   

Description: SDRAM Controller 64-bit data bus. Up to 90MHz SDRAM clock speed. Integrated system memory, graphic frame memory and video frame memory. Supports 8MB up to 128 MB system memory. Supports 16-Mbit, 64-Mbit and 128-Mbit SDRAMs. Supports 8, 16, 32, 64, and 128 MB DIMMs. Supports buffered...

Applications: Built-in flexibility allows the ISL3871 to be configured through a general purpose control bus, for a range of applications. The ISL3871 is housed in either a thin plastic BGA package or a TQFP flat pack suitable for PCMCIA board applications.

Features: TJ = TA + (PD • 230C/W). Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 5: The 01261-0 is tested in a feedback loop that servos VFB to the output of the error amplifier while maintaing ITH/RUN at the midpoint of the cu...

· 012B

Vendor:SMD(2)   Package Cooled:PHILIPS   D/C:N/A   

Description: Typical system performance parameters for the receiver are 93 dB gain, 7.5 dB noise figure, input-referred third-order intercept point (IIP3) of +1 dBm, AGC settling time of 8 µs, and Tx-to-Rx switching time of 3 µs. The transmitter typical system performance parameters are an...

Applications: Figure 3 shows the load transient response. With two 47uF ceramic output capacitors, the maximum output voltage deviation can meet 5% for 50% step load change (3A). In addition, the transient response finishes within 10us. Table 1 lists the bill of materials.

Features: To provide optimal flexibility, the memory array of the 012B is divided into three levels of granularity comprising of sectors, blocks, and pages. The Memory Architecture Diagram illustrates the breakdown of each level and details the number of pages per sector and block. All program operat...

· 012G